PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES

摘要

PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a substantially planarized top surface for the semiconductor device.