发明名称 |
COHERENCY MAINTAINING DEVICE AND COHERENCY MAINTAINING METHOD |
摘要 |
<p>A second-level cache device (200) stores part of registration information of data for a first-level cache device (102) (and other first-level cache devices) in a second-level cache-tag unit (204a) in association with registration information in a second-level-cache data unit (204b), and stores the registration information of data for the first-level cache device (102) in a first-level cache-tag copying unit (204c). A coherency maintaining processor (203a) maintains coherency between the first-level cache device (102) and the second-level cache device (200) based on the information stored in the second-level cache-tag unit (204a) and the first-level cache-tag copying unit (204c).</p> |
申请公布号 |
EP1986101(A1) |
申请公布日期 |
2008.10.29 |
申请号 |
EP20060713674 |
申请日期 |
2006.02.14 |
申请人 |
FUJITSU LTD. |
发明人 |
SAKATA, HIDEKI;KOJIMA, HIROYUKI;UKAI, MASAKI |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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