发明名称 Memory rewind and reconstruction for hardware emulator
摘要 A method and apparatus for debugging circuit designs having random access memory therein. The circuit design is emulated on a hardware logic emulator. The RAM emulated by the emulator can be rewound to a previous state, and then replayed. The RAM emulated by the emulator can also be reconstructed to a state the RAM maintained at some point during a trace window.
申请公布号 US7440884(B2) 申请公布日期 2008.10.21
申请号 US20030373558 申请日期 2003.02.24
申请人 QUICKTURN DESIGN SYSTEMS, INC. 发明人 BELETSKY PLATON;KFIR ALON;LIN TSAIR-CHIN
分类号 G01R31/28;G06F9/455;G01R31/3181;G06F11/22;G06F17/50;G11C29/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址