发明名称 Stacked gate memory cell with erase to gate, array, and method of manufacturing
摘要 A stacked gate nonvolatile memory floating gate device has a control gate. Programming of the cell in the array is accomplished by hot channel electron injecton from the drain to the floating gate. Erasure occurs by Fowler-Nordheim tunneling of electrons from the floating gate to the control gate. Finally, to increase the density, each cell can be made in a trench.
申请公布号 US7439572(B2) 申请公布日期 2008.10.21
申请号 US20050303567 申请日期 2005.12.15
申请人 SILICON STORAGE TECHNOLOGY, INC. 发明人 CHEN BOMY;TRAN HIEU VAN;LEE DANA;FRAYER JACK EDWARD
分类号 H01L29/788;G11C16/04;H01L21/8247;H01L27/115;H01L29/76 主分类号 H01L29/788
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