发明名称 Apparatus and method to maximize buffer utilization in an I/O controller
摘要 An apparatus and method for maximizing buffer utilization in an I/O controller using credit management logic contained within the I/O controller. The credit management logic keeps track of the number of memory credits available in the I/O controller and communicates to a chipset connected to the I/O controller the amount of available memory credits. The chipset may then send an amount of data to the I/O controller equivalent to or less than the communicated available amount of memory credits to reduce the occurrence of a "retry" event. The amount of available memory credits is determined by comparing the available memory in each buffer within the I/O controller and designating that the "available" amount of memory for the I/O controller is an amount equivalent to the amount of memory contained in the buffer with the least amount of available memory. This "available" amount of I/O controller memory may then be converted into memory credits and communicated to the chipset.
申请公布号 US7441055(B2) 申请公布日期 2008.10.21
申请号 US20040815347 申请日期 2004.03.31
申请人 INTEL CORPORATION 发明人 WAGH MAHESH U.;KWOK WILFRED W.;MUTHRASANALLUR SRIDHAR
分类号 G06F3/00;G06F13/00;G06F13/40 主分类号 G06F3/00
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