发明名称 Phasing for a multi-threaded network processor
摘要 A method of and apparatus for associating units of data with threads of a multi-threaded processor for processing, and enabling each thread to perform processing for at least two of the data units during a thread execution period. The thread execution period is divided among phases, and each of the data units processed by a thread is processed by a different one of the phases.
申请公布号 US7441245(B2) 申请公布日期 2008.10.21
申请号 US20030642053 申请日期 2003.08.14
申请人 INTEL CORPORATION 发明人 HOOPER DONALD F.;ROSENBLUTH MARK;BERNSTEIN DEBRA;FALLON MICHAEL F.;JAIN SANJEEV;WOLRICH GILBERT M.
分类号 G06F9/46;G06F9/00;G06F9/30 主分类号 G06F9/46
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