发明名称 Automatic Generation of Test Suite for Processor Architecture Compliance
摘要 A parametrically controlled model-based test generator automatically generates architectural compliance test suites for different implementations of a processor architecture, based on a set of architectural decisions chosen among optional behaviors for each implementation. Thus, different implementations of the same architecture can be easily supported by modifying the parameter values. In addition, ongoing changes to the architecture or comprehensive updates to the test suite can be easily handled by updating the architecture model or the coverage models, forgoing the need to review the whole, potentially huge, set of tests.
申请公布号 US2008255822(A1) 申请公布日期 2008.10.16
申请号 US20070735510 申请日期 2007.04.16
申请人 ADIR ALLON;ASAF SIGAL;FOURNIER LAURENT;JAEGER ITAI 发明人 ADIR ALLON;ASAF SIGAL;FOURNIER LAURENT;JAEGER ITAI
分类号 G06F9/44 主分类号 G06F9/44
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