发明名称 |
Signal Processing Device and Signal Processing Method |
摘要 |
There is provided a signal processing apparatus and a signal processing method, which can simultaneously perform reduction in jitter components and reduction in error rate. A signal processing apparatus for processing a signal by a PRML method is provided with an A/D converter ( 4 ) for converting an analog signal into a digital signal; a first waveform equalizer ( 14 ) which is connected to the A/D converter ( 4 ), and amplifies a specific band of a signal to optimize data of a clock extraction system; a second waveform equalizer ( 15 ) which is connected to the A/D converter ( 4 ), and amplifies the specific band of the signal and performs waveform equalization to optimize data of a data processing system; a timing recovery logic circuit ( 11 ) which is connected to the first waveform equalizer ( 14 ), and extracts a reproduction clock; and a decoder ( 16 ) which is connected to the second waveform equalizer ( 15 ), and decodes data.
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申请公布号 |
US2008253011(A1) |
申请公布日期 |
2008.10.16 |
申请号 |
US20050587080 |
申请日期 |
2005.01.06 |
申请人 |
MATUSUHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
MOURI HIROKI;YAMAMOTO AKIRA |
分类号 |
G11B5/09;G11B20/10;H04L7/033 |
主分类号 |
G11B5/09 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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