SERIAL INTERFACE MEMORY TESTING APPARATUS AND METHOD

摘要

The apparatus, systems and methods described herein relate to a serial-interface flash memory device (10) including a first terminal (12) to receive input data in a first operating phase and to receive a synchronization signal in a test operating phase, a second terminal (20) to receive a clock input in the first operating phase and a test level signal in a test operating phase, and a logic circuit (16) to recognize input data commands indicating that a test operating phase is to commence and to inhibit the clock input during the test operation phase. Other apparatus embodiments and embodiments of methods of operating the apparatus are disclosed.