RECONFIGURABLE SIMD PROCESSOR AND ITS EXECUTION CONTROL METHOD

摘要

It is possible to provide a reconfigurable SIMD processor which can flexibly cope with processing objects of different characteristics and improve the entire processor performance only by slightly increasing a circuit scale as compared to the conventional configuration. A reconfigurable SIMD processor method is also provided. A general-purpose register (GPR10) of a progressive element(PE-1) is initialized by the number of cycles required for a division. A general-purpose register (GPR11) is initialized by 1. A general-purpose register (GPR20) is initialized by a dividend. A general-purpose register (GPR21) is initialized by a divisor. The GPR11 is subtracted from the GPR10 by an adder/subtractor (Add/Sub-1). The number of cycles required for the division is counted. An adder/subtractor (Add/Sub-2) subtracts the GPR21 from the GPR20 until the count value reaches a predetermined value. The GPR20 is updated with a value obtained by left-shifting the subtraction result by 1 bit if the subtraction result is positive and left-shifting the GPR20 by 1 bit if the subtraction result is negative. MSB is removed from the GPR 22 and a bit string obtained by adding a reversed value of the MSB as the subtraction result to the LSB is used to update the GPR22.