发明名称 EVALUATION METHOD FOR WIRING, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain knowledge regarding impurity concentration that closely approximates that in actual wiring structure, by measuring precisely the impurity concentration in a wiring conductive material, under a condition approximating the actual wiring structure, using a sample of relatively simple constitution, and to make the knowledge reflect on actual wiring formation. SOLUTION: A wiring groove 1a is formed in a silicon substrate 1, the wiring groove 1a is embedded by the wiring conductive material 3 to form wiring-like structure 4, and the sample 11 is prepared. The wiring conductive material 3 of the wiring-like structure 4 is subjected to SIMS-analysis by a SIMS method, by using the sample 11. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008249632(A) 申请公布日期 2008.10.16
申请号 JP20070094022 申请日期 2007.03.30
申请人 FUJITSU MICROELECTRONICS LTD 发明人 SUNAYAMA MICHIE;SHIMIZU NORIYOSHI;NAKAISHI MASAFUMI;TERAHARA MASANORI;IWATA HIROSHI
分类号 G01N27/62;G01N23/225;H01L21/3205;H01L23/52 主分类号 G01N27/62
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