发明名称 PLL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To shorten a lock-in time by controlling a PLL circuit according to variations of a process, temperature, a source voltage, etc. <P>SOLUTION: The PLL circuit has a phase detector 1, a charge pump 2, a loop filter 3, and a voltage-controlled oscillator 4 which are connected in a loop, and includes a charge pump 7 for acceleration which can operate in parallel to the charge pump 2, and a control means 5 of controlling the operation timing of the charge pump 7 for acceleration. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008252209(A) 申请公布日期 2008.10.16
申请号 JP20070087504 申请日期 2007.03.29
申请人 RENESAS TECHNOLOGY CORP 发明人 HIROTA TAKANORI;ISHII SUSUMU;KISHIMOTO SATORU;OTA YOSHIYUKI;MAKANE MITSUO;KOSAKA HIROYUKI
分类号 H03L7/107;H03L7/093;H03L7/10 主分类号 H03L7/107
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