| 发明名称 |
INTEGRATED CIRCUIT TEST EQUIPMENT |
| 摘要 |
PURPOSE:To decrease undesirable properties of a glass mold type semiconductor device by controlling a thickness of wax material, as its properties depend upon the thickness. |
| 申请公布号 |
JPS52104874(A) |
申请公布日期 |
1977.09.02 |
| 申请号 |
JP19760021560 |
申请日期 |
1976.02.28 |
| 申请人 |
TOKYO SHIBAURA ELECTRIC CO |
发明人 |
AIDA AKIRA;HANAYAMA SHINICHI |
| 分类号 |
G01R31/26;G06F11/22;H01L21/66 |
主分类号 |
G01R31/26 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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