| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a memory interface circuit for fetching data with a data strobe signal and preventing malfunctions due to noises. <P>SOLUTION: A delay circuit 35 delays the data strobe signal DQS, and outputs a delay signal D1. An AND circuit 36 performs AND operation of the delay signal and the data strobe signal DQS and outputs the operation result as a first strobe signal DQSd. An inverter circuit 37 inputs the first strobe signal DQSd and outputs a second strobe signal Ddx which is complementary to the first strobe signal DQSd. A first FF 32 latches data DQ based on the first strobe signal DQSd, and a second FF 33 latches the data DQ based on the second strobe signal Ddx. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
