| 摘要 |
An integrating analog to digital converter (ADC) is disclosed that comprises a Delay Locked Loop (DLL) ( 2, 50 ) which is synchronized to a reference clock signal (12). A rising edge of a clock signal therefore propagates through the DLL once each clock cycle. In use, the integrating ADC converts an analog input signal to a digital output signal dependent upon a timing measurement of an integration carried out by an integrator ( 4 ). The timing measurement is taken by reading the logical states of the individual delay cells in the DLL. This enables the position of the rising edges of the clock signal to be determined and used as a timing measurement. The timing measurement is in the form of a digital thermometer code that can be converted into a binary number. By using a DLL to take a timing measurement, the effect of process and temperature variations is reduced by the closed loop feedback of the DLL. In another embodiment, a multiplying DLL (MDLL) is used. In a further embodiment a ring oscillator is used instead of a DLL. In that embodiment a calibration unit is used to compensate for the effects of process and temperature variations.
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