STRUCTURE OF SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF THE SAME

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor device package with good CTE performance and a contraction size providing board-level reliability having satisfactory temperature cycle.

SOLUTION: The semiconductor device package comprises a substrate 102 with a pre-formed die receiving cavity 105 and a terminal contact metal pad 112 formed within an upper surface. At lease a first die 104 is disposed within the die receiving cavity. A first dielectric layer 110 is formed on the first die and the substrate, and refilled into a gap between the first die and the substrate to absorb thermal mechanical stress there between. A first re-distribution layer (RDL) 114 is formed on the first dielectric layer and coupled to the first die. A second dielectric layer 116 is formed on the first RDL, and then a second die 120 is disposed on the second dielectric layer and surrounded by core pastes 124 having through holes 126 thereon. A second re-distribution layer (RDL) 128 is formed on the core pastes to fill the through holes, and then a third dielectric layer 130 is formed on the second RDL.

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