Self-Automating Bandwidth Priority Memory Controller

摘要

A memory controller that includes a write first in first out (FIFO) region of the memory for receiving pixel data and a read FIFO region of the memory for accessing the pixel data received through the write FIFO is provided. The memory controller is configured to rearrange the pixel data received by the write FIFO for storage in the memory by writing data representing a first pixel and a second pixel across a plurality of registers in the memory, wherein corresponding bit locations for the data representing the first pixel and the data representing the second pixel are stored within a same one of the plurality of registers. The memory controller is configured to grant access to one of multiple requests for access to the memory based on corresponding bit locations associated with the multiple requests. A graphics controller and a method for prioritizing access to a memory are provided.