| 摘要 |
An analog output buffer circuit is provided. A first transistor has a source, drain, and gate coupled to a first node, a second node, and a third node, respectively. A second transistor is coupled between the second node and the third node. The second transistor has a gate coupled to a first control line. A third transistor has a source coupled to a data line, a drain coupled to the first node, and a gate coupled to the first control line. A fourth transistor has a source coupled to the second node, a drain coupled to an output terminal, and a gate coupled to a second control line. A fifth transistor has a source coupled to the first node, a drain coupled to a first power supply, and a gate coupled to the second control line. A capacitor is coupled between the third node and the first power supply.
|
