A memory circuit system (Figure 1) and method are provided in the context of various embodiments. In one embodiment, an interface circuit (102) remains in communication with a plurality of memory circuits (104) and a system. The interface circuit is operable to interface the memory circuits and the system for performing various functionality (e.g. power management, simulation/emulation, etc.).
申请公布号
WO2008063251(A3)
申请公布日期
2008.10.16
申请号
WO2007US16385
申请日期
2007.07.18
申请人
METARAM, INC.;RAJAN, SURESH NATARAJAN;SCHAKEL, KEITH, R.;SMITH, MICHAEL JOHN SEBASTIAN;WANG, DAVID, T.;WEBER, FREDERICK DANIEL
发明人
RAJAN, SURESH NATARAJAN;SCHAKEL, KEITH, R.;SMITH, MICHAEL JOHN SEBASTIAN;WANG, DAVID, T.;WEBER, FREDERICK DANIEL