发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>A semiconductor memory device is provided to obtain high density of the device and lessen the number of contacts and the wires which are used to connect a gate wiring stacked structure with peripheral circuits by forming first and second interconnection layers in a memory cell array. A semiconductor memory device comprises a substrate(13), a memory cell array, and a peripheral circuit(12-1). The substrate has a step including a first upper surface and a second upper surface higher than the first upper surface. The memory cell array is formed on the first upper surface. The peripheral circuit is formed on the second upper surface and is configured to supply an electrical signal to the memory cell array. The memory cell array includes a stacked structure(15) having a plurality of first interconnection layers and a plurality of second interconnection layers respectively connected to the first interconnection layers. The first interconnection layers are stacked on the first upper surface, are separated from each other by insulating films, and extend in a first direction, and the second interconnection layers extend upward and are separated from each other by insulating films.</p>
申请公布号 KR20080092290(A) 申请公布日期 2008.10.15
申请号 KR20080033304 申请日期 2008.04.10
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MIZUKAMI MAKOTO;NISHIHARA KIYOHITO
分类号 H01L27/115 主分类号 H01L27/115
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