发明名称 |
TUNNELING TRANSISTOR WITH BARRIER |
摘要 |
<p>The invention suggests a transistor (21) comprising a source (24) and a drain (29) as well as a barrier region (27) located between the source and the drain. The barrier region is separated from the source and the drain by intrinsic or lowly doped regions (26, 28) of a semiconductor material. Potential barriers are formed at the interfaces of the barrier region and the intrinsic or lowly doped regions. A gate electrode (32) is provided in the vicinity of the potential barriers such that the effective height and/or width of the potential barriers can be modulated by applying an appropriate voltage to the gate electrode.</p> |
申请公布号 |
EP1979935(A1) |
申请公布日期 |
2008.10.15 |
申请号 |
EP20070700678 |
申请日期 |
2007.01.24 |
申请人 |
NXP B.V. |
发明人 |
HURKX, GODEFRIDUS;AGARWAL, PRABHAT |
分类号 |
H01L21/336;H01L29/06;H01L29/10;H01L29/78 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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