发明名称 |
Use of I2C programmable clock generator to enable frequency variation under BMC control |
摘要 |
The present invention provides systems and methods for performing frequency margin testing of a computer system, such as a server. A system of the invention can include a controller, e.g., a BMC, internal to the computer system and a digital frequency synthesizer that can communicate with the controller and can apply clock frequency to marginable components of the computer system. In response to commands from the controller, the synthesizer generates one or more test frequencies that are applied to one or more of the marginable components. The response of the system to each of the test frequencies is then monitored.
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申请公布号 |
US7437258(B2) |
申请公布日期 |
2008.10.14 |
申请号 |
US20030606713 |
申请日期 |
2003.06.26 |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
ROBERTSON NAYSEN JESSE;PERCER BENJAMIN THOMAS;YATES KIRK |
分类号 |
G01R23/00;G06F11/24;G01R31/00;G01R31/30;G06F1/04;G06F11/22;G11C29/02 |
主分类号 |
G01R23/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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