发明名称 Architecture for reducing leakage component in semiconductor devices
摘要 An architecture for reducing leakage component in semiconductor devices using a gated power supply is based on the supply being split into two parts. An alternate inverter is connected to a different power rail derived from the same single power rail. The power rails are enabled and disabled according to the value of a standby signal and an input signal. The standby signal is high in the standby mode and low in the active mode.
申请公布号 US7436201(B2) 申请公布日期 2008.10.14
申请号 US20060618116 申请日期 2006.12.29
申请人 STMICROELECTRONICS PVT LTD. 发明人 KUMAR ASHISH
分类号 H03K17/16 主分类号 H03K17/16
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