发明名称 |
Repatterned integrated circuit chip package |
摘要 |
A repatterned integrated circuit chip package which balances and/or reduces the package capacitance associated with the gain resistor terminals to reduce the degradation of common mode rejection with frequency. |
申请公布号 |
US7436052(B2) |
申请公布日期 |
2008.10.14 |
申请号 |
US20050067795 |
申请日期 |
2005.02.28 |
申请人 |
ANALOG DEVICES, INC. |
发明人 |
GERSTENHABER MOSHE;TRAN CHAU C. |
分类号 |
H01L23/02;H01L23/50;H03F3/45 |
主分类号 |
H01L23/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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