发明名称 Step-down circuit with stabilized output voltage
摘要 A semiconductor integrated circuit device is equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.
申请公布号 US7436247(B2) 申请公布日期 2008.10.14
申请号 US20070783988 申请日期 2007.04.13
申请人 发明人
分类号 G05F3/10;G05F1/56 主分类号 G05F3/10
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