发明名称 |
Process for fabricating a heterostructure-channel insulated-gate field-effect transistor, and the corresponding transistor |
摘要 |
The insulated-gate field-effect transistor includes a substrate surmounted by a layer of silicon-germanium alloy, the ratio of the germanium concentration to the silicon concentration of which increases towards the surface of the substrate. The transistor is formed on the active zone in the silicon-germanium alloy layer and lies between two isolating zones. The transistor includes a narrow heterostructure strained-semiconductor channel including a SiGe alloy layer in compression and a silicon layer in tension, extending between the gate and a dielectric block buried in the substrate.
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申请公布号 |
US7436005(B2) |
申请公布日期 |
2008.10.14 |
申请号 |
US20050227681 |
申请日期 |
2005.09.15 |
申请人 |
STMICROELECTRONICS (CROLLES 2) SAS;COMMISSARIAT A L'ENERGIE ATOMIQUE |
发明人 |
MONFRAY STEPHANE;BOREL STEPHAN;SKOTNICKI THOMAS |
分类号 |
H01L29/94;H01L21/336;H01L29/06;H01L29/10;H01L29/786 |
主分类号 |
H01L29/94 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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