发明名称 Delay locked loop with improved jitter and clock delay compensating method thereof
摘要 A delay locked loop can remove a jitter component that inevitably occurs due to feedback latency in the conventional DLL. That is, the present invention has benefit of removing the jitter component by controlling the delay lines based on the predicted data. The delay locked loop includes a pattern detecting unit for generating and storing a noise pattern by detecting inputted noise data, a pre-delay control unit for determining a delay amount depending on the output of the pattern detecting unit, and a pre-delay line for delaying an internal clock depending on the delay amount that is determined by the pre-delay control means.
申请公布号 US7436230(B2) 申请公布日期 2008.10.14
申请号 US20030746226 申请日期 2003.12.23
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM KYUNG-HOON
分类号 G11C11/407;H03L7/06;G11C7/22;H03L7/081;H03L7/085 主分类号 G11C11/407
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