发明名称 SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 A leakage current of the MOS transistor of a power control section at a standby time is drastically reduced and the reduction of the consumption power is achieved. A memory module is provided with power control sections. When either of the memory mats is not selected, the power control sections stop the power supply voltage to a non-selected memory mat, a word driver, an input-output circuit, a control circuit and an output circuit. At the standby time of the memory module, the power control section stops a power supply to power control sections, a control circuit, a predecoder circuit, and an input circuit. In this manner, the leakage current of the MOS transistor of the power control sections at the standby time can be drastically reduced.
申请公布号 US2008247258(A1) 申请公布日期 2008.10.09
申请号 US20080117804 申请日期 2008.05.09
申请人 发明人 WATANABE NORIYOSHI;MAEDA NORIAKI;YAMAOKA MASANAO;SHINOZAKI YOSHIHIRO
分类号 G11C5/14;G11C7/22;G11C8/08;G11C11/41;G11C11/413 主分类号 G11C5/14
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