METHOD FOR FABRICATING A LOW COST INTEGRATED CIRCUIT (IC) PACKAGE

摘要

A method for fabricating a low cost integrated circuit package (500) includes separating a processed silicon wafer into a plurality of individual die (501) and then positioning the die on a secondary substrate in a face down position for allowing an increased die I/O connection area. The die is covered with one or more epoxy materials (504) to form a group of embedded die packages. The group of embedded packages is removed from the secondary substrate and the topside of the group of embedded die packages is covered by a further epoxy (502). One or more pads on the die are then exposed and subsequently connected to an I/O connection (506) in a die I/O connection area. Each of the die are then separated forming singular embedded die packages (500) from the secondary substrate. The method provides a manufacturing process, to form a low cost, very high density integrated circuit package using a combination of both wafer scale packaging and wafer level packaging processes.