| 摘要 |
<p>Provided is a semiconductor integrated circuit device capable of shortening the reset period (or time) of a chip. The semiconductor integrated circuit device comprises a nonvolatile memory made active to read trimming information after completion of a data line precharge, a power-on reset circuit (64) made active, in response to a power source ON, to reset the control circuit of the nonvolatile memory, and a power-on precharge circuit (66) made active, in response to the power source ON, to precharge the data line. The power-on reset circuit (64) includes a first CR operation circuit (642) for outputting a reset releasing signal indicatingthe switching of a voltage level, at the instant when a first predetermined time (T1) elapsed after the power source ON. The power-on precharge circuit (66) includes a second CR operation circuit (662) for outputting a precharge completing signal indicating the switching of the voltage level, at the instant when a second predetermined time (T2) elapsed after the power source ON. The first predetermined time (T1) is longer than the second predetermined time (T2).</p> |
