发明名称 MEMORY MONITORING CIRCUIT, INFORMATION PROCESSING APPARATUS AND MEMORY MONITORING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a memory monitoring circuit, an information processing apparatus and a memory monitoring method that implement a high monitoring capability. <P>SOLUTION: The information processing apparatus 10 has a main memory 2 to be monitored, a CPU 1 for executing programs stored in the main memory 2, the memory monitoring circuit 4 for monitoring the main memory 2 for anomalies, a temporary memory 5 for temporarily swapping data stored in the main memory 2, and a bus arbitration part 3 for disabling the CPU 1 from accessing the main memory 2 and enabling the memory monitoring circuit 4 to access the main memory 2 during the monitoring of the main memory 2. The memory monitoring part 4 regards a part or all of the data in the main memory 2 as a monitored area, swaps out the data in the monitored area into the temporary memory 5, and tests the monitored area. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008242592(A) 申请公布日期 2008.10.09
申请号 JP20070079159 申请日期 2007.03.26
申请人 NEC CORP 发明人 NISHIOKA YOSHIKAZU
分类号 G06F12/16 主分类号 G06F12/16
代理机构 代理人
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