发明名称 Method for reducing polysilicon gate defects in semiconductor devices
摘要 Semiconductor devices and fabrication methods are provided, in which gate defects associated with photoresist stress after plasma trim/etch are substantially reduced. The method comprises forming a gate dielectric layer above a semiconductor body substrate; coating the gate dielectric layer with a photoresist coating; exposing and developing the photoresist coating; performing a resist annealing; and trimming and etching the photoresist coating.
申请公布号 US2008248640(A1) 申请公布日期 2008.10.09
申请号 US20070732969 申请日期 2007.04.05
申请人 TEXAS INSTRUMENTS INC. 发明人 GU YIMING;ZHANG GARY;HALL CRAIG
分类号 H01L21/3205 主分类号 H01L21/3205
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