| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device that suppresses layout area increase in automatic placement and routing of DRAM. SOLUTION: The semiconductor device includes a plurality of elements located on a substrate and constituting logic and memory, a plurality of wiring 37-40 to connect the plurality of elements, and a plurality of wiring layers with the plurality of wiring located thereon. The plurality of elements include a plurality of delay adjusting elements 22a-22d having one electrode and the other electrode, voltage of the one electrode fixed. The plurality of wiring include signal wiring to communicate an internal clock utilized in the memory, and a plurality of first wiring located on imaginary straight lines spaced uniformly in a topmost layer in the plurality of wiring layers. In the plurality of delay adjusting elements, the other electrode is connected to the signal wiring by way of one of the plurality of first wiring. COPYRIGHT: (C)2009,JPO&INPIT
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