| 摘要 |
PURPOSE:To reduce the resistance values of a gate electrode, source and drain regions of MISFET while preventing oxidation from occuring by a method wherein high melting point metallic films and a non-oxidizable metallic film are formed on the gate electrode, source and drain regions to make the high melting point metals, the non-oxidiable metal and silicon combine with one another so that high melting point metallic silicide films may be formed on the upper parts of respective elements. CONSTITUTION:A field insulating film 2, a p-type channel stopper region 3, a gate insulating film 4 are formed on the surface of a p<-> type substrate 1 and then a polycrystalline silicon film (gate electrode) 5 is formed into specified shape by etching process in a gate electrode forming forming region. Next, an n-type semiconductor region 7 is formed in a source.drain forming region. Then, in the process of forming insulating films 8 (sidewalls) on the sides of film 5 from the sidewalls of film 5 with excellent controllability of film thickness and self alignment with the film 5, the surface of film 5 and the main surface of semiconductor region 7 are exposed to be successively laminated with a high melting point metallic film 6C and non-oxidizable metallic film 6D. Next, a high melting point metallic silicide film 6A is formed on the film 5 to complete an electrode G, besides, n-type impurity is led to the main surface of substrate 1 through another high melting point metallic silicide film 6b formed on the region 7 and finally a source region S and a drain region D comprising a semiconductor region 9 and the semiconductor region 7 are formed.
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