发明名称 CHIP-SIZE PACKAGE
摘要 PROBLEM TO BE SOLVED: To provide a chip-size package capable of preventing sensor characteristics from being deteriorated at a sensor by external stress from an IC side or residual stress. SOLUTION: The chip-size package has: a sensor substrate 1, where the IC E2 is formed around the sensor E1 and a region E3 for junction is formed around the IC; a through-hole wiring formed substrate (a first package substrate) 2; and a cover substrate (a first package substrate) 3. For the sensor substrate 1, a first metal layer 18 for sealing and a first metal layer 19 for electric connection are formed adjacently on the surface of the region E3 for junction. For the through-hole wiring formed substrate 2, a second metal layer 28 for sealing is formed adjacent to a second metal layer 29 for electric connection. For the sensor substrate 1 and the through-hole wiring formed substrate 2, activated junction surfaces of the metal layers 18, 28 for sealing are joined at ordinary temperatures, and the activated junction surfaces of the metal layers 19, 29 for electric connection are joined at ordinary temperatures. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008244175(A) 申请公布日期 2008.10.09
申请号 JP20070083024 申请日期 2007.03.27
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 BABA TORU;KATAOKA KAZUSHI;SAIJO TAKASHI;OKUTO TAKASHI;GOTO KOJI;MIYAJIMA HISAKAZU
分类号 H01L23/02;G01P15/08;H01L29/84 主分类号 H01L23/02
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