发明名称 SUPPLY VOLTAGE GENERATING CIRCUIT
摘要 A supply voltage generating circuit that enables a reduction in chip area includes: a booster for outputting a boosted voltage upon generating the boosted voltage by charge pumping of a capacitor element; a power-supply step-down unit for stepping down voltage of an external power supply to a voltage within a breakdown-voltage range of the capacitor element, and applying the stepped-down voltage to the power supply of the booster; and a switch element for switching between application of the external power supply to the power supply of the booster directly or via the power-supply step-down unit. The booster comprises multiple stages of booster circuits. The thicknesses of gate oxide films of capacitor elements constituted by MOS transistors included in respective ones of the booster circuits are the same and are made smaller than the thickness of a gate oxide film of a MOS transistor included in a load circuit having the output of the booster at its power supply.
申请公布号 US2008238536(A1) 申请公布日期 2008.10.02
申请号 US20080052422 申请日期 2008.03.20
申请人 ELPIDA MEMORY, INC 发明人 HAYASHI KOICHIRO;TANAKA HITOSHI
分类号 G05F1/10 主分类号 G05F1/10
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