| 摘要 |
A jitter detection circuit comprises: an oscillation circuit; a measurement period setting circuit for outputting a measurement period signal based on a measurement period specifying signal, said measurement period setting circuit receiving the output clock from a PLL circuit; a counter for counting the number of clock cycles output from the oscillation circuit over the period during which the measurement period signal is being output; a reference count value determining circuit for setting a reference count value for the number of clock cycles output from the oscillation circuit over the period during which the measurement period signal is being output; and an error detection circuit for detecting the jitter error of the PLL circuit based on the maximum count value and minimum count value counted by the counter, and the reference count value.
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