发明名称 |
SYNCHRONIZING SERIAL TRANSFER SYSTEM |
摘要 |
PURPOSE:To improve the transfer efficiency by retarding a serial data from a data transmission side by 1/2 clock period, transferring the result to a data reception side so as to quicken the data latch timing at the data reception side. CONSTITUTION:A data 11 to be sent in a data transmitter 1 is loaded in a shift register 7 as a parallel data and transferred to a re-timing device 3 via a data line 4 as a serial data. The serial data is transferred to a data receiver 2 via a data line 5 while it is retarded by 1/2 clock. Then it is possible to fetch the serial data at the leading faster than the trailing of the clock signal by 1/2 clock period at the data receiving side. Thus, the transfer efficiency is improved.
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申请公布号 |
JPS62287736(A) |
申请公布日期 |
1987.12.14 |
申请号 |
JP19860130153 |
申请日期 |
1986.06.06 |
申请人 |
HITACHI LTD;NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
KAWAI ATSUO;SUGANO MINORU;YASHIRO ZENICHI |
分类号 |
H03K5/00;H04L7/04;H04L25/40;H04L25/52 |
主分类号 |
H03K5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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