| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that error correction against any word line failure is high in probability to be impossible, and that reliability is low in using an error correction code incapable of correcting errors across a plurality of blocks. SOLUTION: Write data rearrangement circuits 6-1 to 6-3 rearrange data including an error correction code belonging to the same block so that the data can be written in the same failure unit bits of a memory element, and output the rearranged data as write data, and the rearranged write data corresponding to a word line failure mode are written in a memory 110 so that the data of one block can be included in the same failure unit. Read data read from the memory 110 are rearranged in the original line by read data rearrangement circuits 8-1 to 8-3, and error detection and correction are operated. COPYRIGHT: (C)2009,JPO&INPIT
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