GATE OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING USING THE SAME

摘要

A gate of a semiconductor device and a method for manufacturing the same are provided to alleviate HEIP(Hot Electron Induced Punchthrough) phenomenon without forming a tap on a gate line by forming an oxide layer thick or thin according to a gate process condition. An isolation layer defining an active region(200) with a gate region is formed in a semiconductor substrate(204). A gate dielectric includes a first gate dielectric(208) and a second gate dielectric(212). The first gate dielectric is formed at a boundary part of the active region and the isolation layer of the gate region. The second gate dielectric is formed at the remaining active region part except for the region where the first gate dielectric is formed. A thickness of the second gate dielectric is different form that of the first gate dielectric. A gate conductive layer is formed on the gate dielectric. The first gate dielectric is thicker than the second gate dielectric. A thickness of the first gate dielectric is 50 to 70Å. A thickness of the second gate dielectric is 25 to 40Å.