发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN METHOD, AND SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN APPARATUS |
摘要 |
A semiconductor integrated circuit design method includes a step (L) of providing layout information for laying out elements making up a logical circuit on a semiconductor substrate; a step (P) of providing logical circuit information; a step (a) of classifying logical circuits in response to the logical circuit propagation route of a signal based on the logical circuit information and a step (b) of isolating the logical circuits forming the route obtained in the classifying step (a) for each number of stages; a step (c) of classifying the elements making up the logical circuit according to substrate voltage for each number of stages of the logical circuit; and a layout correction step (d) of correcting the layout information so that each element with the larger stage number of the logical circuit is placed at a point closer to a substrate contact.
|
申请公布号 |
US2008238486(A1) |
申请公布日期 |
2008.10.02 |
申请号 |
US20080022825 |
申请日期 |
2008.01.30 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
SUMITA MASAYA |
分类号 |
H03K19/00;G06F17/50 |
主分类号 |
H03K19/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|