| 摘要 |
A semiconductor memory device is provided to suppress a leakage current by disposing an additional fuse in a MOS transistor connected with a fuse. A semiconductor memory device includes a fuse, a discharge unit(N4), a logic delivery unit(I4), and a resistance unit. The discharge unit discharges a voltage applied to the fuse. The logic delivery unit activates the discharge unit in response to a logic level corresponding to the voltage applied to the fuse. The resistance unit implemented at a side of the discharge unit reduces the amount of a discharge current generated by the discharge unit. The discharge unit includes a MOS(Metal Oxide Semiconductor) transistor. |
