| 摘要 |
A multi chip memory device is provided to utilize plural page chips as one page by independently accessing respective chips in the multi chip memory device having two or more memory chips. A multi chip memory device includes plural memory chips. Each of memory chips includes command decoding units(212,222), address controllers(213,223), data controllers(214,224), and controllers(215,225). The command decoding units decode a command code from input data which are inputted from outside. The address controllers output a chip enable control signal for controlling operation regardless of operation of another chip according to the address of a corresponding chip using address information of the input data. The data controllers buffer data inputted or outputted in the memory chips and output the buffered data according to a data output control signal. The controllers output the data output control signal regardless of operation of another chip according to the chip enable control signal of the address controllers. |
