发明名称 |
METHODS AND APPARATUS FOR PLANAR EXTENSION OF ELECTRICAL CONDUCTORS BEYOND THE EDGES OF A SUBSTRATE |
摘要 |
Concurrent electrical access to the pads of integrated circuits on a wafer is provided by an edge-extended wafer translator that carries signals from one or more pads on one or more integrated circuits to contact terminals on the inquiry-side of the edge-extended wafer translator, including portions of the inquiry-side that are superjacent the wafer when the wafer and the edge-extended wafer translator are in a removably attached state, and portions of the inquiry side that reside outside a region defined by the intersection of the wafer and the edge-extended wafer translator. In a further aspect of the present invention, access to the pads of integrated circuits on a wafer is additionally provided by contact terminals in a second inquiry area located on the wafer-side of the edge-extended wafer translator in a region thereof bounded by its outer circumference and the circumference of the attached wafer.
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申请公布号 |
WO2008010919(A3) |
申请公布日期 |
2008.10.02 |
申请号 |
WO2007US15529 |
申请日期 |
2007.07.07 |
申请人 |
OCTAVIAN SCIENTIFIC, INC.;JOHNSON, MORGAN, T. |
发明人 |
JOHNSON, MORGAN, T. |
分类号 |
G01R31/02 |
主分类号 |
G01R31/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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