| 摘要 |
PROBLEM TO BE SOLVED: To solve such a problem that a time duration for wiring arrangement increases accompanying with elements being large-scaled. SOLUTION: A wiring arrangement method is an arrangement method of the wiring of arranging the shield wiring to a shield object wiring arranged on a chip, comprising the steps of: establishing plural wiring tracks on the chip; dividing the chip into at least first and second regions along a partitioning boundary line; arranging a primary dummy terminal which touches the partitioning boundary line in the first region on a wiring track adjacent to the shield object wiring among the plural wiring tracks; arranging a secondary dummy terminal which touches the partitioning boundary line in the second region on the wiring track adjacent to the shield object wiring; arranging a first shield wiring connected to the primary dummy terminal on the wiring track adjacent to the shield object wiring in the first region; and arranging a second shield wiring connected to the primary dummy terminal on the wiring track adjacent to the shield object wiring in the first region. COPYRIGHT: (C)2009,JPO&INPIT |
