| 摘要 |
<p>A pillar type field effect transistor having low leakage current is provided to reduce the amount of current in an off-state by reducing largely GIDL(Gate Induced Drain Leakage). A gate insulating layer(106) is formed on a part of a semiconductor pillar(120). A gate electrode is formed on the gate insulating layer. A source/drain region(103,110) is formed on a region on which the gate electrode is not formed. The gate electrode is composed of a first gate electrode(107), a second gate electrode(109), and a gate interlayer dielectric(108). The first gate electrode has a work function higher than the work function of the second gate electrode. The gate interlayer dielectric is formed between the first gate electrode and the second gate electrode. The first gate electrode and the second gate electrode are electrically connected with each other by using a contact or a metal line.</p> |
