| 摘要 |
An interface circuit is disclosed that can include a delay circuit that generates a delay signal obtained by delaying a data strobe signal; a first logical circuit that performs a logical operation of on the data strobe signal and the delay signal, and outputs an operation result as a first strobe signal; a second logical circuit that receives the first strobe signal and generates a second strobe signal that is complementary to the first strobe signal; a first latch circuit that latches a data signal based on the first strobe signal; and a second latch circuit that latches the data signal based on the second strobe signal.
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