| 摘要 |
PROBLEM TO BE SOLVED: To provide a large capacity semiconductor device in which electrostatic malfunction resistance is enhanced without increasing the chip size. SOLUTION: The semiconductor device has first and second MOS capacitors 2 and 105 connected in parallel between a power supply line 102 and a ground line 103. The first MOS capacitor 2 is a depletion type MOS capacitor and the second MOS capacitor 105 is an enhancement type MOS capacitor having the same conductivity type as that of the first MOS capacitor 2. The first MOS capacitor 2 is formed on an N well layer 4 and the second MOS capacitor 105 is formed on a semiconductor substrate 3 where the N well layer 4 is not formed. Both elements are isolated by an element isolation insulating film 5. COPYRIGHT: (C)2009,JPO&INPIT
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