发明名称 RAM circuit with accumulator
摘要 A dual port RAM 10 is connected to an addition circuit 18 such that when a data value is written to the RAM, the current value at the address to be written is retrieved, added to the value to be written and the total value is stored in the dual port RAM. A reset signal 20 causes the circuit to write the new value to the addressed location without adding the current value. A second dual port RAM 12 may be used to store a duplicate copy of the value to allow one value to be read while another is being written. The reset signal may be used to select which portion of the dual port RAM is currently being read or written.
申请公布号 GB2448066(A) 申请公布日期 2008.10.01
申请号 GB20080005507 申请日期 2008.03.26
申请人 CALREC AUDIO LTD 发明人 JOHN PATRICK WARRINGTON
分类号 G06F7/50 主分类号 G06F7/50
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