发明名称 System and method to align clock signals
摘要 A system and method use an aligning device to align clock signals of two logic devices before data transfer between them. In this example, the aligning device aligns a clock signal of a sequencer with a clock signal of a storage device before the sequencer transfers data to the storage device. The aligning device includes a phase detector that receives a first reference clock signal, which is used to control the storage device, and a delayed signal, which is used to control the sequencer, and generates a comparison clock signal. The comparison clock signal is filtered before being used to control a phase of a second reference clock signal, which is related to the first reference clock signal. The phase controlled second clock signal is an aligning clock signal that is feed back to a delay device to produce one or more subsequent delay device clock signals that are aligned to the storage device clock or first reference clock signal. These subsequent delay device clock signals are transmitted to the aligning device and to the sequencer before each transfer occurs.
申请公布号 US7430680(B2) 申请公布日期 2008.09.30
申请号 US20050169006 申请日期 2005.06.29
申请人 BROADCOM CORPORATION 发明人 D'LUNA LIONEL J.;HUGHES THOMAS A.;RADHAKRISHNAN SATHISH KUMAR
分类号 H03L7/06 主分类号 H03L7/06
代理机构 代理人
主权项
地址